CreatiVEmu Forum

I'm going to make FPGA implementation for the CV (or at least give it a try).

I checked various sources and it seems we have the HDL code for all the chips that are on the CV motherboard (PIA, SN, TMS, 6502). So it should be a matter of gluing all together strictly following the hardware schematic. I already have the 6502+TMS9918 working in a custom Apple1 implementation that I wrote recently, so I'll start from there.

The platform would be the MiST FPGA, how many of you still have and use it ?

I've started working on the project and have written the first raw version (which of course isn't working) as the result of looking at the schematic, placing the chips and connecting them together (all virtually).

I've published it on a GitHub repo here: nippur72/CreatiVision_MiST

If you want to give a look it's written in Verilog and it's quite easy to read at least in the CreatiVision-specific code. Compiles with "Quartus II Web 13.1".

There is a lot to do ahead, but this is the first step.

Just curious if you progressed this any further? I don’t see any further commits on GitHub, so I’m guessing the project maybe got parked?

GregZone wrote: ↑

Sat Jul 22, 2023 10:42 pm

Just curious if you progressed this any further? I don’t see any further commits on GitHub, so I’m guessing the project maybe got parked?

It's a different project, but I completed mine some time ago if you are interested in an fpga implementation:
https://github.com/MiSTer-devel/CreatiV ... master/rtl