Salora Manager / Laser 2001 BASIC

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The VDP Mystery

How does the write gate on the Salora Manager / Laser 2001 get set?

Have they come up with a way to switch when a write is made at $3000 ?

Here are the VDP functions for the Salora Manager / Laser 2001

Code: Select all

 **************************************************************
 * WRITEVDP                                                   *
 **************************************************************
e963 8d 00 30        STA        DAT_3000
e966 60              RTS

 **************************************************************
 * READVDP                                                    *
 **************************************************************
e96b ad 00 20        LDA        DAT_2000
e96e 60              RTS

 **************************************************************
 * SETVDPADDR                                                 *
 **************************************************************
e96f 08              PHP
e970 78              SEI
e971 20 67 e9        JSR        WRITEVDPCTL
e974 8a              TXA
e975 49 80           EOR        #0x80
e977 20 67 e9        JSR        WRITEVDPCTL
e97a 28              PLP
e97b 60              RTS

 **************************************************************
 * WRITEVDPCTL                                                *
 **************************************************************
e967 8d 01 30        STA        DAT_3001
e96a 60              RTS

These are the same functions as the creatiVision, but duplicated for some reason.

There is nothing special here, VDP control is at $3001, VDP Write is at $3000 and VDP Read is at $2000 - same as creatiVision so far.

The VDP mode settings are just

Code: Select all

 **************************************************************
 * TEXT                                                       *
 **************************************************************
ea40 a2 07           LDX        #0x7
				 LAB_ea42
ea42 bd 4d ea        LDA        0xea4d,X=>DAT_ea54

ea45 20 6f e9        JSR        SETVDPADDR
ea48 ca              DEX
ea49 10 f7           BPL        LAB_ea42
ea4b 30 08           BMI        LAB_ea55
ea4d 00              DB         00h
ea4e f0              DB         F0h
ea4f 0e              DB         0Eh
ea50 ff              DB         FFh
ea51 03              DB         03h
ea52 7e              DB         7Eh
ea53 03              DB		    03h
				 DAT_ea54
ea54 20              DB 		20h

 **************************************************************
 * GR                                                         *
 **************************************************************
e97c a2 07           LDX        #0x7
				 LAB_e97e
e97e bd 89 e9        LDA        0xe989,X=>DAT_e990
e981 20 6f e9        JSR        SETVDPADDR
e984 ca              DEX
e985 10 f7           BPL        LAB_e97e
e987 30 08           BMI        LAB_e991
e989 02              DB         02h
e98a e0              DB         E0h
e98b 0f              DB         0Fh
e98c ff              DB         FFh
e98d 03              DB         03h
e98e 7e              DB         7Eh
				 DAT_e98f
e98f 03              DB			03h

Standard again, just write register value, register number with high bit set (EOR #$80 in SETVDPADDR).

Now look at VPOKE and VPEEK.

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 **************************************************************
 * VPOKE                                                      *
 **************************************************************
f220 20 74 d8        JSR        GTNUM
f223 8a              TXA
f224 48              PHA
f225 a6 51           LDX        DAT_0051
f227 a5 50           LDA        DAT_0050
f229 20 6f e9        JSR        SETVDPADDR
f22c 68              PLA
f22d 20 63 e9        JSR        WRITEVDP
f230 60              RTS

 **************************************************************
 * VPEEK                                                      *
 **************************************************************
f23a a5 51           LDA        DAT_0051
f23c 09 80           ORA        #0x80
f23e aa              TAX
f23f a5 50           LDA        DAT_0050
f241 20 6f e9        JSR        SETVDPADDR
f244 20 6b e9        JSR        READVDP
f247 4c 9f d8        JMP        LAB_d89f

With VPEEK normal stuff, set high bit to clear it in SETVDPADDR - then read byte.

With VPOKE write address, with high bit set, as if writing a register, then write byte.

In creatiVision world, you would set bit 6 ($40) to enable write gate before writing.

Do these machines know that a write to $3000 means enable gate?

If you made it this far - go google Grace Charis golf - you deserve it